Elitegroup Computer Systems BIOS, P5TX-B PCB 2.0, Version 1.1 BIOS Driver

1. Set the default value of "Fast RAS to CAR Delay" to be 3 CLKs

2. For supporting Cyrix P200+, adjust DRAM timing at 75 MHz bus speed as follows:

(1) DRAM R/W leadoff: 11/7/4

(2) DRAM Read Burst Timing (FP/EDO): x333/x444

(3) DRAM write Burst Timing: X333

(4) Fast RAS to CAS Delay: 3 CLKs

(5) Fast MA to RAS# Delay: 1 CLKs

(6) SDRAM (CAS/RAS Latency): 3/3

3. Fix code bugs for PCI 32Bit protect mode functions for passing PCIDIAG testing

4. Add Write Allocation support for K6 CPU and change the dislpay string for K6 to "AMD-K6/PR2-XXX" where XXX is the core freq

5. Support M2 CPU become standard feature

6. Disable delay for FASTIO and set reserved bit 1 of RCR7 to 0

7. Disable delay for ADS# and enable CPUID for M2 for MMX function , requested by CYRIX

8. Passes the "Restore Power On" test of APM 1.x of SCT 5.30

9. Eliminates auto-configuring function for COM ports. It, thus, sloves the IRQ assignment problem among PCI and PnP ISA devices in Windows 95

10. Updates DMI data of mother board

11. Prevents keyboard from hanging while PS2 mouse is being hot-plugged after system was booted

12. Fixes CDROM can not boot if LS120 floppy drive is connected

13. Solve the problem that systems hang at C1 or C6 (memory sizing) while rebooting